A substrate area estimation technique for Multi-Chip Modules

The estimation of substrate areas of Multi-Chip Modules is a very important task in the partitioning of a MCM based electronic system. Moreover, due to the similarities between large area MCMs (hybrid-WSI) and monolithic-WSI it has become increasingly clear that regular structures are significantly better suited than others for implementation in these technologies. This paper introduces a substrate area estimation for MCMs with regular structures, using Massively Parallel Computers as an example