DocumentCode
2397276
Title
Defect-tolerant hypercube architectures using hierarchical redundancy
Author
Tsuda, Nobuo ; Ishikawa, Tsutomu
Author_Institution
NTT Inf. & Commun. Syst. Labs., Tokyo, Japan
fYear
1995
fDate
18-20 Jan 1995
Firstpage
143
Lastpage
152
Abstract
This paper proposes an advanced hierarchical redundancy scheme using additional bypass linking (ABL) for defect tolerance in wafer-scale integrated circuits (WSIs) with hypercube architectures. This scheme can markedly reduce the number of nonredundant switches for connecting spares, so it enhances the yield of WSIs compared to the conventional scheme using primary link switching, when applied to full binary hypercubes (BHCs) and cube-connected cycles (CCCs). This paper also proposes an advanced BHC-like cube with hierarchical redundancy called an HR-CCT cube. The basic CCT cube consists of a set of sub-BHCs each of which provides additional torus links. These subcubes are connected to each other by a hierarchical complete connection scheme. The HR-CCT cube using ABL is also advantageous for defect tolerance, and has better network features than the redundant SHCs and CCCs
Keywords
fault tolerant computing; hypercube networks; parallel architectures; redundancy; wafer-scale integration; HR-CCT cubes; additional bypass linking; binary hypercubes; cube-connected cycles; defect tolerance; hierarchical redundancy; hypercube architectures; nonredundant switches; primary link switching; subcubes; torus links; wafer-scale integrated circuits; yield; Communication switching; Hypercubes; Integrated circuit yield; Joining processes; Laboratories; Redundancy; Switches; Switching circuits; Transmission line matrix methods; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Wafer Scale Integration, 1995. Proceedings., Seventh Annual IEEE International Conference on
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-2467-6
Type
conf
DOI
10.1109/ICWSI.1995.515448
Filename
515448
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