Title :
Test strategies for multi-chip modules based on economics considerations
Author :
Dislis, C. ; Jalowiecki, I.P.
Author_Institution :
Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
Abstract :
This paper describes an economics based methodology for the investigation of test strategies for multi-chip modules. Multi chip module technologies offer a way of overcoming the interconnection bottleneck which can be a problem with conventional interconnect technologies as the complexity of integrated circuits increases through the use of rapidly diminishing feature sizes. The use of multi-chip modules (MCMs) has many advantages in terms of size, weight and power (e.g. in satellite applications), increased functional density and possibly improved reliability over PCB based solutions
Keywords :
economics; integrated circuit manufacture; integrated circuit testing; multichip modules; MCM testing; economics based methodology; multichip modules; test strategies; Assembly; Automatic testing; Costs; Integrated circuit interconnections; Integrated circuit technology; Life testing; Power generation economics; Production; Semiconductor device modeling; Software testing;
Conference_Titel :
Wafer Scale Integration, 1995. Proceedings., Seventh Annual IEEE International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-2467-6
DOI :
10.1109/ICWSI.1995.515471