DocumentCode
2397817
Title
An introduction to computer algorithms designed to facilitate IDDT current testing of CMOS circuits
Author
Thomas, Scott
Author_Institution
Dept. of ECE, North Carolina Univ., Charlotte, NC
fYear
2005
fDate
1-1 May 2005
Firstpage
71
Lastpage
76
Abstract
This work presents an overview of a new computer algorithm and a computer aided design (CAD) tool. Both of these prove to be useful for dynamic power supply current test methods. In the growing field of iDDT testing many analysis tools that have existed for decades can be used effectively to provide various its levels of results. However, new fields of study often require new tools. This work presents an introduction to the "Toggle" algorithm and the "Mapper" CAD tool. These tools can be used to advance the study and practice of iDDT testing as well as other testing methods
Keywords
CMOS integrated circuits; circuit CAD; circuit analysis computing; integrated circuit testing; CMOS circuits; Mapper CAD tool; Toggle algorithm; computer aided design tool; dynamic supply current; iDDT current testing; power supply current; Algorithm design and analysis; Automatic test pattern generation; Circuit faults; Circuit noise; Circuit testing; Current measurement; Delay; Integrated circuit measurements; Switches; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Current and Defect Based Testing, 2005. DBT 2005. Proceedings. 2005 IEEE International Workshop on
Conference_Location
Palm Springs, CA
Print_ISBN
1-4244-0034-1
Type
conf
DOI
10.1109/DBT.2005.1531307
Filename
1531307
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