A flexible 2-D switched-capacitor FPAA architecture and its mapping algorithm

Author

Koneru, Satyaki ; Lee, Edward K F ; Chu, Connie

Author_Institution

Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA

Volume

1

fYear

1999

fDate

1999

Firstpage

296

Abstract

A flexible and area efficient 2-D switched-capacitor FPAA architecture is proposed. In this architecture, a configurable analog block (CAB) can connect to 12 other nearby CABs and access to 10 programmable capacitor arrays (PCAs). The routing switches between CABs and PCAs are utilized for charge transfer required in switched-capacitor (SC) circuits. Therefore, it minimizes the number of connecting switches between CABs and PCAs, thereby, it reduces the settling time of the resultant SC circuits. Since this architecture has its unique connection properties, a specialized mapping algorithm for mapping SC circuit onto the architecture is also proposed in this paper

Keywords

analogue processing circuits; programmable circuits; reconfigurable architectures; switched capacitor networks; area efficiency; configurable analog block; flexible 2D switched-capacitor FPAA architecture; mapping algorithm; programmable capacitor array; routing switch; settling time; Analog circuits; Charge transfer; Clocks; Computer architecture; Field programmable analog arrays; Field programmable gate arrays; Principal component analysis; Routing; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. 42nd Midwest Symposium on

Conference_Location

Las Cruces, NM

Print_ISBN

0-7803-5491-5

Type

conf

DOI

10.1109/MWSCAS.1999.867265

Filename

867265