Title :
Quasi-cyclic low-density parity-check convolutional code
Author :
Wang, Yixiang ; Yu, Hui ; Xu, Youyun
Author_Institution :
Dept. of Electron. Eng., Shanghai Jiao Tong Univ., Shanghai, China
Abstract :
This paper proposes a novel quasi-cyclic low-density parity-check convolutional code, and a two-stage construction algorithm with modified progressive edge growth (PEG) method is provided. We propose both encoder and decoder implementation architecture for this code. The quasi-cyclic form provides the parallelism for encoder and decoder, which can increase the throughput and decrease the delay significantly. The proposed modified min-sum decoding algorithm can speed up the process of convergence and reduce the hardware complexity. We also designed a GPU based simulation platform to speed up about 200 times against CPU to verify the code performance. Simulation results show the proposed code can get 0.5~1dB coding gain and lower error floor compared with the LDPC codes in WiMAX standard with the same code length, while the decoder only has 20 iterators.
Keywords :
WiMax; block codes; codecs; communication complexity; cyclic codes; decoding; encoding; graphics processing units; parity check codes; GPU based simulation platform; LDPC codes; LDPC-BC; PEG method; WiMAX standard; coding gain; decoder; encoder; hardware complexity; low-density parity-check block code; min-sum decoding algorithm; progressive edge growth method; quasi-cyclic low-density parity-check convolutional code; two-stage construction algorithm; Algorithm design and analysis; Decoding; Encoding; Equations; Graphics processing unit; Instruction sets; Iterative decoding;
Conference_Titel :
Wireless and Mobile Computing, Networking and Communications (WiMob), 2011 IEEE 7th International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4577-2013-0
DOI :
10.1109/WiMOB.2011.6085376