Membrane-type pin protector for pin grid array devices

Author

Wang, Shay-Ping T. ; Ogden, Paul

Author_Institution

Motorola Inc., Chandler, AZ, USA

fYear

1991

fDate

21-23 Oct 1991

Firstpage

120

Lastpage

127

Abstract

A membrane-type pin protector (membrane) for pin grid array (PGA) devices and its implementation in ASIC (application-specific integrated circuit) final manufacturing are discussed. First, the membrane design issues and membrane parameters are outlined. Then, experimental design techniques are applied to obtain proper membrane settings that satisfy both compliance and gripping force requirements. Membrane-related equipment and operations are also described. Finally, the effectiveness of the membrane for ESD (electrostatic discharge) and bent pin protection is demonstrated

Keywords

application specific integrated circuits; integrated circuit technology; packaging; ASIC; ESD; bent pin protection; compliance; electrostatic discharge; final manufacturing; gripping force; membrane design; membrane parameters; membrane-type pin protector; pin grid array devices; Application specific integrated circuits; Assembly; Biomembranes; Electronics packaging; Electrostatic discharge; Pins; Plastics; Protection; Semiconductor device manufacture; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference and Workshop, 1991. ASMC 91 Proceedings. IEEE/SEMI 1991

Conference_Location

Boston, MA

Print_ISBN

0-7803-0152-8

Type

conf

DOI

10.1109/ASMC.1991.167396

Filename

167396