Title :
Harmonic Balance Technique in Context of Functional Hardware Verification
Author :
Serdyuk, Gennady ; Shelkovnikov, Boris
Author_Institution :
Inst. of Telecommun. Syst., Kiev
fDate :
Feb. 28 2006-March 4 2006
Abstract :
This paper describes problems related to verification of communication systems and demonstrates approach of digital and harmonic balance co-simulation.
Keywords :
formal verification; hardware description languages; hardware-software codesign; communication systems verification; digital balance co-simulation; functional hardware verification; harmonic balance technique; Circuit simulation; Circuit testing; Communication industry; Hardware design languages; Logic testing; Manufacturing; Production systems; Registers; System testing; Timing; Co-simulation; Hardware Description Languages; Harmonic Balance; VHDL-AMS; Verification;
Conference_Titel :
Modern Problems of Radio Engineering, Telecommunications, and Computer Science, 2006. TCSET 2006. International Conference
Conference_Location :
Lviv-Slavsko
Print_ISBN :
966-553-507-2
DOI :
10.1109/TCSET.2006.4404582
