A 1.544 Mb/s CMOS Line Driver for 22.8 Ohm Load

Author

Herrmann, H. ; Koch, R.

fYear

1989

fDate

20-22 Sept. 1989

Firstpage

137

Lastpage

140

Abstract

A CMOS line driver for the ISDN Primary Access Transceiver IPAT is presented. Operating in bridge configuration a driver pair delivers. 7.2 Vpp output voltage into a differential load of 22.8Ω at a data rate of 1.544 Mb/s (T1 application), using a single 5V supply voltage . The main feature of the single drivers is a control unit which stabilizes the quiescent current in the output stage at 20mA, while the peak output current is 180mA (T1). The circuit can also be logically configurated to deliver 6 Vpp into a differential load of 60Ω with a quiescent current of 7mA and a data rate of 2.048 Mb/s (CEPT application). Because of its large output transistors, the driver pair occupies an area of 6500 square mils in a 2μm p-well technology.

Keywords

CMOS integrated circuits; ISDN; bridge circuits; driver circuits; transceivers; CMOS line driver; IPAT; ISDN primary access transceiver; bit rate 1.544 Mbit/s; bridge configuration; current 7 mA; differential load; p-well technology; quiescent current stability; resistance 22.8 ohm; resistance 60 ohm; size 2 mum; voltage 5 V; Bridge circuits; Current control; Driver circuits; Feedback loop; ISDN; Impedance; Inverters; Pulse shaping methods; Transceivers; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European

Conference_Location

Vienna

Print_ISBN

3-85403-101-7

Type

conf

DOI

10.1109/ESSCIRC.1989.5468133

Filename

5468133