Title :
Electrical performance of chip-on-chip modules
Author :
Low, Yee L. ; O´Connor, Kevin J.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
Abstract :
Chip-on-chip (COC) logic/memory integration alters the electrical characteristics of both IC components. We identify several electrical design issues associated with signal transmission, the power distribution system and the I/O buffers that limit the performance of COC modules
Keywords :
crosstalk; integrated circuit design; integrated circuit modelling; integrated circuit noise; integrated circuit packaging; integrated circuit testing; integrated logic circuits; integrated memory circuits; modules; COC modules; I/O buffers; IC components; chip-on-chip logic/memory integration; chip-on-chip modules; electrical characteristics; electrical design; electrical performance; power distribution system; signal transmission; Application specific integrated circuits; Bonding; Electric variables; Integrated circuit interconnections; Logic circuits; Logic devices; Packaging; Polyimides; Substrates; Transistors;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1998. IEEE 7th Topical Meeting on
Conference_Location :
West Point, NY
Print_ISBN :
0-7803-4965-2
DOI :
10.1109/EPEP.1998.733488
