DocumentCode
2399392
Title
First level package design considerations for the IBM´s S/390 G5 server
Author
Katopis, George ; Becker, Dale ; Stoller, Herb
Author_Institution
S/390 Dev. Lab., IBM Corp., Poughkeepsie, NY, USA
fYear
1998
fDate
26-28 Oct 1998
Firstpage
15
Lastpage
16
Abstract
Summary form only given. The recently announced S/390 G5 server has achieved many “firsts” in the enterprise server market segment. The most prominent achievement is the virtual elimination of the performance gap at the system level between CMOS and bipolar based microprocessor designs. To this end, many new technology elements were introduced to both the semiconductor and package technologies. Specifically, the microprocessor used many innovative circuit design concepts and an advanced CMOS technology (0.18 μm nominal effective channel length) to attain a peak operating frequency of 500 MHz in a chilled operating environment. To support this microprocessor performance with sufficient design margin, the first level package had to operate at 300 MHz under the same environmental conditions. This goal was achieved by the introduction of a glass ceramic MCM containing six layers of a polyimide thin film structure that provided an xy signal line plane pair sandwiched between a power and ground plane for the intra chip connections in addition to the redistribution wiring. This combination of a 127×127 mm glass ceramic MCM with full field thin film wiring was another technology first and its physical and electrical characteristics are presented here
Keywords
CMOS digital integrated circuits; ceramic packaging; cooling; glass ceramics; integrated circuit design; integrated circuit interconnections; microprocessor chips; multichip modules; network servers; polymer films; thermal management (packaging); 0.18 micron; 127 mm; 300 MHz; 500 MHz; CMOS based microprocessor designs; CMOS technology; IBM S/390 G5 server; bipolar based microprocessor designs; chilled operating environment; circuit design; design margin; effective channel lengt; electrical characteristics; enterprise server market segment; environmental conditions; first level package; first level package design; full field thin film wiring; glass ceramic MCM; ground plane; intra chip connections; microprocessor; microprocessor performance; package technologies; peak operating frequency; performance gap elimination; physical characteristics; polyimide thin film structure; power plane; redistribution wiring; semiconductor technologies; technology elements; xy signal line plane pair; CMOS technology; Ceramics; Circuit synthesis; Frequency; Glass; Microprocessors; Polyimides; Semiconductor device packaging; Transistors; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 1998. IEEE 7th Topical Meeting on
Conference_Location
West Point, NY
Print_ISBN
0-7803-4965-2
Type
conf
DOI
10.1109/EPEP.1998.733490
Filename
733490
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