A 9.5 inch, 1.3 mega-pixel low temperature poly-Si TFT-LCD fabricated by SPC of very thin films and an ECR-CVD gate insulator

Author

Little, Thomas W. ; Koike, Hideki ; Takahara, Ken-Ichi ; Nakazawa, Takashi ; Ohshima, Hiroyuki

Author_Institution

Seiko Epson Corp., Nagano, Japan

fYear

1991

fDate

15-17 Oct. 1991

Firstpage

219

Lastpage

222

Abstract

A unique combination of solid-phase crystallization (SPC) and gate insulator technology has been used to fabricate low-temperature poly-Si TFTs (thin-film transistors). Using this technology, a high-resolution 9.5-in TFT-LCD (liquid crystal display) with 1.3 mega-pixels has been realized. SPC has allowed the formation of poly-Si TFTs with both lower OFF currents and higher ON currents than as-deposited poly-Si TFTs, without sacrificing the latter´s inherent advantages of uniformity and large area capability. Meanwhile, ECR-CVD (electron cyclotron resonance chemical vapor deposition) SiO/sub 2/ has allowed excellent control of the MOS interface and eliminates the need for hydrogenation.<>

Keywords

elemental semiconductors; insulated gate field effect transistors; liquid crystal displays; plasma CVD; recrystallisation annealing; semiconductor technology; silicon; silicon compounds; thin film transistors; 1.3 Mpixel; 9.5 inch; MOS interface; Si-SiO/sub 2/; electron cyclotron resonance chemical vapor deposition; gate insulator technology; polysilicon; solid-phase crystallization; thin-film transistors; Annealing; Chemical vapor deposition; Crystallization; Fabrication; Insulation; Semiconductor films; Silicon on insulator technology; Substrates; Temperature; Thin film transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Display Research Conference, 1991., Conference Record of the 1991 International

Conference_Location

San Diego, CA, USA

Print_ISBN

0-7803-0213-3

Type

conf

DOI

10.1109/DISPL.1991.167474

Filename

167474