The restrain of the dead time effects in parallel inverters

In inverters, the waveform distortions in output voltage caused by the dead times can be successfully compensated by the instantaneous voltage feedback regulators like PI regulator, and this always makes the dead time effects in parallel inverters be ignored. However, for the filter inductances and output impedances in high power inverters must be very small (for consideration of system cost, internal voltage drop and fast dynamic response), the discrepancy of the dead times in power switches of parallel inverters can result in considerable circulating currents, which can hardly be eliminated by the instantaneous voltage feedback regulators and load share regulators. This paper analyzed the dead-time effects on the circulating currents between parallel inverters. The simulations and experiments validated the analysis