• DocumentCode
    2399978
  • Title

    A VLSI-intensive fault-tolerant computer architecture

  • Author

    Pollack, Fred ; Johnson, Dave ; Carson, Dave ; Ebersole, Ron ; Kini, Vittal ; Lai, Konrad ; Silvernail, Bernie ; Stacey, Steve

  • Author_Institution
    BiiN, Hillsboro, OR, USA
  • fYear
    1990
  • fDate
    Feb. 26 1990-March 2 1990
  • Firstpage
    134
  • Lastpage
    142
  • Abstract
    An architecture optimized for strategic computing was built. The architecture employs a comprehensive VLSI approach, with new hardware and a new operating system. By starting from scratch it was possible to make tradeoffs at all levels (VLSI, hardware systems, and software systems) to provide optimal solutions to meet the challenges of strategic computing. In addition to a high-performance microprocessor based on reduced-instruction-set-computer (RISC) principles, a VLSI component was built for each functional block of a computer system to construct a balanced computer architecture. Instead of implementing fault tolerance with additional hardware, the requisite fault-tolerant features were built directly into these same VLSI components.<>
  • Keywords
    VLSI; fault tolerant computing; parallel architectures; reduced instruction set computing; RISC; VLSI-intensive fault-tolerant computer architecture; functional block; high-performance microprocessor; operating system; optimal solutions; reduced-instruction-set-computer; strategic computing; Application software; Computer applications; Computer architecture; Control systems; Fault tolerance; Hardware; Instruction sets; Military computing; Operating systems; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '90. Intellectual Leverage. Digest of Papers. Thirty-Fifth IEEE Computer Society International Conference.
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-2028-5
  • Type

    conf

  • DOI
    10.1109/CMPCON.1990.63665
  • Filename
    63665