An Analog-Oriented Routing Tool for CMOS Analog Integrated Circuits

Author

Piguet, S. ; Rahali, F. ; Declercq, M. ; Kayal, M.

Author_Institution

Swiss Fed. Inst. of Technol. (EPFL), LEG/EL-Ecublens, Lausanne, Switzerland

fYear

1989

fDate

20-22 Sept. 1989

Firstpage

80

Lastpage

83

Abstract

The performance of analog ICs strongly depends on layout characteristics. After identifying the various categories of placement and routing constraints, this paper describes a routing strategy dedicated to take into account those specific analog features. Working in close coordination with an analog placement tool, the new routing tool uses global and local routing techniques that can handle the various constraints. It uses intelligent path scheduling and multi-constrained path minimization with electrical extraction capabilities. The selection of some routing options can be controlled by an expert system. The aim of the router is to be as close as possible to a designer´s routing style. Results of automated analog layouts are presented.

Keywords

CMOS analogue integrated circuits; electronic design automation; expert systems; integrated circuit layout; network routing; CMOS analog integrated circuits; analog oriented routing tool; automated analog layout; electrical extraction; intelligent path scheduling; layout characteristic; multiconstrained path minimization; routing strategy; Algorithm design and analysis; Analog circuits; Analog integrated circuits; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Expert systems; Integrated circuit interconnections; Integrated circuit technology; Routing;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European

Conference_Location

Vienna

Print_ISBN

3-85403-101-7

Type

conf

DOI

10.1109/ESSCIRC.1989.5468182

Filename

5468182