DocumentCode
2400201
Title
Area and Timing Optimisation of high performant datapaths with CHOPIN-2
Author
Rijnders, L. ; Sahraoui, Z. ; Six, P. ; De Man, H.
Author_Institution
IMEC, Leuven, Belgium
fYear
1992
fDate
21-23 Sept. 1992
Firstpage
271
Lastpage
274
Abstract
High throughput applications require dedicated datapaths. Their performance can be improved by selecting an appropriate logic implementation and by optimising the number and position of pipeline registers. The CHOPIN-2 toolbox provides the user with the possibility to generate a number of design alternatives and optimise the clock speed. The CHOPIN-2 system has been implemented and tested on a number of industrial datapaths.
Keywords
clocks; logic circuits; optimisation; performance evaluation; pipeline processing; CHOPIN-2; area optimisation; clock speed; high performant datapaths; industrial datapaths; logic implementation; pipeline registers; timing optimisation; Arithmetic; Boolean functions; Circuits; Clocks; Data structures; Delay; Logic; Pipelines; Throughput; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European
Conference_Location
Copenhagen
Print_ISBN
87-984232-0-7
Type
conf
DOI
10.1109/ESSCIRC.1992.5468189
Filename
5468189
Link To Document