DocumentCode
2400626
Title
First Wafer Delay and setup: How to measure, define and improve First Wafer Delays and setup times in semiconductor fabs
Author
Radloff, Stefan ; Abravanel, Mario ; Rhoads, Blane ; Steeg, Dylan ; Van der Meulen, Peter ; Petraitis, Martin
Author_Institution
Intel Corp., Andover, MA, USA
fYear
2009
fDate
10-12 May 2009
Firstpage
86
Lastpage
90
Abstract
First wafer delay (FWD) has been identified as a barrier to reduced fab cycle time and increased equipment productivity. As such, initiatives to reduce first wafer delay have been proposed as a focal point for next generation semiconductor fabs, including both 450 mm fabs as well as ldquo300 mm Primerdquo factories. FWD and setup time are major detractors for cycle time reduction, in particular for small lot manufacturing. The definition of FWD, causes, as well as methods for improving FWD are discussed, in addition to recommendations for future equipment and factory design.
Keywords
semiconductor process modelling; wafer bonding; cycle time reduction; first wafer delay; semiconductor fabs; setup time; size 450 nm; Computer architecture; Delay effects; Production facilities; Productivity; Scheduling algorithm; Semiconductor device manufacture; Semiconductor device modeling; Testing; Throughput; Time measurement; 300mm Prime; 450mm fabs; First wafer delay; cycle time; setup time;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference, 2009. ASMC '09. IEEE/SEMI
Conference_Location
Berlin
ISSN
1078-8743
Print_ISBN
978-1-4244-3614-9
Electronic_ISBN
1078-8743
Type
conf
DOI
10.1109/ASMC.2009.5155959
Filename
5155959
Link To Document