A Pattern Recognition Demonstrator based on a Silicon Neural Chip

This paper describes a self-standing hardware pattern recognition system based on neural algorithms. The system uses a dedicated VLSI neural chip which implements a vector-matrix multiplier built of an array of 16 × 8 multiplying D/A converters with an 8-bit digital storage cell each. The conversion principle is based on an aperiodic clock which rotates data through a weighting shift register. A prototype chip has been fabricated, tested and assembled together with an array of photodetectors for simple image recognition purposes. The system has been conceived as a stand-alone demonstrator of pattern recognition capabilities of Artificial Neural Networks.