A High Frequency CMOS Power Buffer with Extended Linearity

A CMOS power buffer suitable for high frequency applications is discussed. The use of a high-speed push-pull output stage and a highly-linear common mode feedback allow good linearity to be maintained even with very high input frequencies. Indeed, Total Harmonic Distortions (THD) as good as -66 dB and -58 dB are achieved at 0.5 MHz and 1 MHz, respectively, with a load resistance of 75 Ω. Moreover, the circuit provides a dc gain of 62 dB and a gain-bandwidth product of 60 MHz. The integrated prototype, realized using a 1.2 μm CMOS process, occupies a silicon area of 280 mils².