DocumentCode
2401294
Title
Advances in Quantum Computing Fault Tolerance and Testing
Author
Feinstein, David Y. ; Nair, V.S.S. ; Thornton, Mitchell A.
Author_Institution
Southern Methodist Univ., Dallas
fYear
2007
fDate
14-16 Nov. 2007
Firstpage
369
Lastpage
370
Abstract
We study developments in quantum computing (QC) testing and fault tolerance (FT) techniques and discuss several attempts to formalize quantum logic fault models. We illustrate the inherent need for fault tolerance in QC due to the decoherence problem. Further, we examine several ideas regarding random testing and examine the viability of built-in-system-test (BIST) in future QC circuits.
Keywords
built-in self test; fault tolerance; logic circuits; logic testing; quantum computing; built-in-system-test; decoherence problem; fault tolerance; quantum computing testing; quantum logic fault models; random testing; Circuit faults; Circuit testing; Concurrent computing; Electrical fault detection; Fault tolerance; Hilbert space; Logic circuits; Logic testing; Quantum computing; Systems engineering and theory;
fLanguage
English
Publisher
ieee
Conference_Titel
High Assurance Systems Engineering Symposium, 2007. HASE '07. 10th IEEE
Conference_Location
Plano, TX
ISSN
1530-2059
Print_ISBN
978-0-7695-3043-7
Type
conf
DOI
10.1109/HASE.2007.53
Filename
4404762
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