DocumentCode
2401333
Title
Yield optimization of analog ICs using 2-step analytic modeling methods
Author
Guardiani, Carlo ; Scandolara, Primo ; Benkoski, Jacques ; Nicollini, Germano
Author_Institution
SGS-Thomson Microelectron., Agrate Brianza, Italy
fYear
1992
fDate
21-23 Sept. 1992
Firstpage
171
Lastpage
174
Abstract
We applied two innovative methods for statistical design optimization in the design of a CMOS OP-AMP. The most important feature of these methods is the derivation of an analytic function representing the yield surface in the design parameters space. All the required operations are implemented in an integrated CAD system and fully automatized. The results are compared with measures on several wafer lots.
Keywords
CMOS analogue integrated circuits; circuit CAD; circuit optimisation; integrated circuit yield; operational amplifiers; statistical analysis; 2-step analytic modeling method; CMOS op-amp; analog IC; design parameter space; integrated CAD system; wafer lots; yield optimization; Circuit simulation; Design automation; Design for experiments; Design optimization; Integrated circuit modeling; Optimization methods; Pluto; Polynomials; Random variables; Response surface methodology;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European
Conference_Location
Copenhagen
Print_ISBN
87-984232-0-7
Type
conf
DOI
10.1109/ESSCIRC.1992.5468265
Filename
5468265
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