A novel hybrid topology for Network on Chip

The connection method of Network on Chip (NoC) fabric or NoC Topology plays a vital role in the performance of NoC. The end-to-end delay or latency and other performance metrics of packets in NoCs are highly dependent on the number of hops that a packet has travelled to reach its destination. A novel NoC topology called hybrid NoC topology is proposed, which consists the characteristics of the mesh, the torus and the folded torus topology. The proposed architecture reduces the number of average hops by 32% compared to mesh topology, 5% compared to torus and folded torus topology and offers lesser average latency 26% when compared to mesh topology and 4% lesser average latency when compared to torus and folded torus topologies, respectively. The ideal throughput of hybrid topology increases by 200% compared to mesh, 50% compared to that of torus and folded torus. The proposed hybrid NoC Topology offers significant improvement in performance in terms of the average minimum hop count, latency, and throughput. The Verilog RTL of individual routers and topologies were synthesized using Synopsys DC compiler targeting 90nm technology. The performance in terms of area, power and timing shows that the proposed hybrid architecture is on par with the existing topologies.