• DocumentCode
    2402488
  • Title

    A fault-tolerant FPGA-based multi-stage interconnection network for space applications

  • Author

    Alderighi, Monica ; Casini, Fabio ; Angelo, Sergio D. ; Salvi, Davide ; Sechi, Giacomo R.

  • Author_Institution
    Ist. di Fisica Cosmica "G. Occhialini", CNR, Milan, Italy
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    302
  • Lastpage
    306
  • Abstract
    Current space applications are pushing for improved on-board processing abilities, in terms of higher computing power, flexibility and fault-resistance, in order to keep up with the huge amount of collected scientific data. Multiprocessor systems seem a viable solution to match these requisites. In particular, systems employing multistage interconnection networks (MINs) offer the advantage of an effective resource allocation, depending on variable workloads and occurrence of faults. The paper presents a fault-tolerant interconnection mechanism, based on redundant MIN, for multi-sensor systems. The proposed system is implemented by means of field programmable gate arrays (FPGAs) and allows a flexible re-organization of computing resources in dependence of varying operating conditions. Fault-tolerance is achieved both by exploiting the MIN intrinsic redundancy and by using an efficient FPGA reconfiguration technique
  • Keywords
    fault tolerance; field programmable gate arrays; logic design; multiprocessor interconnection networks; redundancy; sensor fusion; space vehicle electronics; FPGA reconfiguration technique; FPGAs; MINs; computing flexibility; computing power; fault occurrence; fault-resistance; fault-tolerant FPGA-based multi-stage interconnection network; fault-tolerant interconnection mechanism; field programmable gate arrays; flexible computing resources reorganization; multi-sensor systems; multiprocessor systems; multistage interconnection networks; on-board processing abilities; redundant MIN; resource allocation; scientific data; space applications; variable workloads; Costs; Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Multiprocessing systems; Multiprocessor interconnection networks; Redundancy; Resource management; Space missions; Space technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Design, Test and Applications, 2002. Proceedings. The First IEEE International Workshop on
  • Conference_Location
    Christchurch
  • Print_ISBN
    0-7695-1453-7
  • Type

    conf

  • DOI
    10.1109/DELTA.2002.994635
  • Filename
    994635