Title :
A method of static test compaction based on don´t care identification
Author :
Miyase, Kohei ; Kajihara, Seiji ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Japan
Abstract :
In this paper, we propose a procedure to compact a test set for a combinational circuit. Given a test set in which all input values are specified, the procedure first identifies don´t care inputs of the test set, and next reassigns appropriate values to the don´t cares to achieve test compaction. The procedure can be applied repeatedly, until further compaction cannot be derived. Experimental results show effectiveness of the proposed procedure for the ISCAS benchmark circuits
Keywords :
VLSI; automatic testing; combinational circuits; fault simulation; integrated circuit testing; logic testing; ISCAS benchmark circuits; VLSI; combinational circuit; don´t care inputs; input values; static compaction techniques; test compaction procedure; Circuit faults; Circuit testing; Combinational circuits; Compaction; Electrical fault detection; Electronic equipment testing; Fault detection; Logic testing; Microelectronics; System testing;
Conference_Titel :
Electronic Design, Test and Applications, 2002. Proceedings. The First IEEE International Workshop on
Conference_Location :
Christchurch
Print_ISBN :
0-7695-1453-7
DOI :
10.1109/DELTA.2002.994657
