A CMOS Resistive-fuse Processor for 2-D Image Acquisition, Smoothing, and Segmentation

Author

Yu, Paul C. ; Lee, Hae-Seung

Author_Institution

Dept. of Electr. Enginnering & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA

fYear

1992

fDate

21-23 Sept. 1992

Firstpage

147

Lastpage

150

Abstract

An integrated CMOS resistive-fuse processor capable of smoothing out noise while preserving the edges of a 32×32 image is described. An on-chip photo-transistor imager converts the optical image into electrical currents. The design of a single-pixel processing element using resistive fuses is described. The processed output is read out using a row decoder and a column MUX. Operating from a single 5-V supply, the chip typically dissipates only 10 mW.

Keywords

CMOS integrated circuits; image segmentation; phototransistors; 2D image acquisition; column MUX; electrical currents; image segmentation; image smoothing; integrated CMOS resistive-fuse processor; on-chip phototransistor imager; optical image; power 10 mW; row decoder; single-pixel processing element; voltage 5 V; CMOS process; CMOS technology; Circuits; Fuses; Image segmentation; MOS devices; Optical noise; Resistors; Smoothing methods; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European

Conference_Location

Copenhagen

Print_ISBN

87-984232-0-7

Type

conf

DOI

10.1109/ESSCIRC.1992.5468379

Filename

5468379

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2403344