Self-aligned InGaP/InGaAs/GaAs heterostructure MESFET technology for analog-digital hybrid type ICs

Author

Sugitani, S. ; Yamane, Y. ; Nittono, T. ; Yamazaki, H. ; Nishimura, K. ; Yamasaki, K.

Author_Institution

NTT LSI Labs., Kanagawa, Japan

fYear

1994

fDate

16-19 Oct. 1994

Firstpage

123

Lastpage

126

Abstract

This paper describes a new pseudomorphic InGaP/InGaAs/GaAs heterostructure MESFET (HMESFET) technology combined with a refractory self-aligned gate process for ultra-high-speed analog-digital hybrid type ICs. InGaAs is used as the thin channel layer for its higher carrier concentration. An undoped InGaP thin layer is used to improve breakdown voltage. A planar device process has been successfully developed by using self-aligned n/sup +/-implantation technology with refractory gate metal and oxygen ion implantation for device isolation. Symmetric and asymmetric FETs can be produced with the same technology by only changing the implantation angle.

Keywords

III-V semiconductors; MESFET integrated circuits; aluminium compounds; gallium arsenide; gallium compounds; indium compounds; integrated circuit technology; ion implantation; mixed analogue-digital integrated circuits; very high speed integrated circuits; InGaP-InGaAs-GaAs; asymmetric FETs; breakdown voltage; carrier concentration; isolation; planar device; pseudomorphic InGaP/InGaAs/GaAs heterostructure MESFET; refractory gate metal; self-aligned n/sup +/-implantation technology; symmetric FETs; ultra-high-speed analog-digital hybrid ICs; Analog-digital conversion; Epitaxial layers; FETs; Fabrication; Gallium arsenide; Indium gallium arsenide; Ion implantation; Isolation technology; MESFETs; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1994. Technical Digest 1994., 16th Annual

Conference_Location

Phildelphia, PA, USA

ISSN

1064-7775

Print_ISBN

0-7803-1975-3

Type

conf

DOI

10.1109/GAAS.1994.636945

Filename

636945