Title :
A CMOS phase frequency detector for charge pump phase-locked loop
Author :
Lee, G.B. ; Chan, P.K. ; Siek, L.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Abstract :
This paper presents the design of a new phase frequency detector (PFD) which uses only 16 transistors and it preserves the desirable properties of the conventional PFD implemented using D-type flip-flop structure. It can be operated 1.5 times faster than the conventional counterpart using a 0.8 μm CMOS technology at a 3 V supply
Keywords :
CMOS digital integrated circuits; digital phase locked loops; flip-flops; phase detectors; 0.8 micron; 3 V; CMOS; D-type flip-flop structure; PFD; charge pump phase-locked loop; phase frequency detector; Character generation; Charge pumps; Circuits; Jitter; Linearity; Phase frequency detector; Phase locked loops; Signal generators; Space vector pulse width modulation; Steady-state;
Conference_Titel :
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location :
Las Cruces, NM
Print_ISBN :
0-7803-5491-5
DOI :
10.1109/MWSCAS.1999.867710
