Title :
Correlated-double sampling time-multiplexing integrator
Author :
Chan, P.K. ; Siek, L. ; Yeo, S.C. ; Yong, S.S. ; Zhang, H.L. ; Tse, M.S.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Abstract :
A new correlated-double sampling time-multiplexing integrator, which incorporates a channel-controlled phase selection scheme using the reset with a 2-phase clock instead of a conventional 3-phase clock, is proposed. It cancels the amplifier offset and 1/f noise, with -95 dBm noise floor in a second-order low-pass filter prototype
Keywords :
1/f noise; CMOS analogue integrated circuits; Chebyshev filters; integrating circuits; low-pass filters; multiplexing; switched capacitor filters; 1/f noise cancellation; 2-phase clock; amplifier offset cancellation; channel-controlled phase selection scheme; correlated-double sampling integrator; second-order low-pass filter prototype; time-multiplexing integrator; CMOS technology; Capacitors; Clocks; Crosstalk; Low pass filters; Low-noise amplifiers; Noise cancellation; Operational amplifiers; Prototypes; Sampling methods;
Conference_Titel :
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location :
Las Cruces, NM
Print_ISBN :
0-7803-5491-5
DOI :
10.1109/MWSCAS.1999.867737
