DocumentCode
24053
Title
0.3–4.3 GHz Frequency-Accurate Fractional- 
Frequency Synthesizer With Integrated VCO and Nested Mixed-Radix Digital  in a fractional- N frequency synthesizer is a power of two, then the output frequency is constrained to be a rational multiple of the phase detector frequency (f<sub>PD</sub>), where the denominator of the rational multiplier is a power of two. If the required output frequency is not related to f<sub>PD</sub> in this way, one is forced to approximate the ratio by using a small programmable modulus DΔΣM or a very large power-of-two modulus. Both of these solutions involve additional hardware. Furthermore, the programmable modulus solution can suffer from spurs, while the large power of two lacks accuracy. This paper presents a new solution, based on mixed-radix algebra, where the required ratio is formed by combining two different moduli. The programmable modulus solves the accuracy problem, while the large power-of-two modulus minimizes the spur content. In addition, the phase detector can be clocked at high speed. This paper explains the theoretical foundations of the method, elaborates a design methodology, and presents measured results for an 0.18 μm SiGe BiCMOS prototype.</div></div>
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<div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Keywords</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>BiCMOS digital integrated circuits; Ge-Si alloys; controllers; delta-sigma modulation; digital arithmetic; frequency synthesizers; voltage-controlled oscillators; SiGe; digital delta sigma modulator; divider controller; frequency 0.3 GHz to 4.3 GHz; frequency accurate fractional N frequency synthesizer; integrated VCO; nested mixed radix digital modulator; phase detector frequency; rational multiplier; size 0.18 mum; Frequency control; Frequency conversion; Frequency modulation; Frequency synthesizers; Noise; Phase frequency detector; Quantization (signal); Fractional-<formula formulatype=)
$N$ frequency synthesizer; digital delta–sigma modulator; spurious tones;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2014.2322095
Filename
6822651
Link To Document