0.25V FDSOI CMOS technology for ultra-low voltage applications

Author

Shang, Huiling ; White, Marvin H. ; Adams, Dennis A.

Author_Institution

Sherman Fairchild Lab., Lehigh Univ., Bethlehem, PA, USA

fYear

2002

fDate

7-10 Oct 2002

Firstpage

37

Lastpage

38

Abstract

A symmetrical threshold voltage design for FDSOI CMOS devices provides a 10³ ON-OFF current ratio to realize ultra-low voltage, low power operation. We describe FDSOI CMOS device electrical characteristics along with circuit operation at supply voltages as low as 0.25 V. A figure of merit of 5 fJ/stage is achieved at 0.25 V on 0.25μm, 2-input NAND gate FDSOI CMOS ring oscillators. Series resistance and polydepletion effects limit the performance of FDSOI CMOS devices and circuits.

Keywords

CMOS integrated circuits; NAND circuits; integrated circuit measurement; logic gates; low-power electronics; silicon-on-insulator; 0.25 V; 0.25 micron; 2-input NAND gate FDSOI CMOS ring oscillators; FDSOI CMOS technology; ON-OFF current ratio; Si; circuit operation; electrical characteristics; figure of merit; low power operation; polydepletion effects; series resistance; symmetrical threshold voltage; ultra-low voltage applications; CMOS integrated circuits; Integrated circuit measurements; Silicon on insulator technology;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, IEEE International 2002

Print_ISBN

0-7803-7439-8

Type

conf

DOI

10.1109/SOI.2002.1044406

Filename

1044406