DocumentCode :
2405987
Title :
Effect of back-gate biasing on the performance and leakage control in deeply scaled SOI MOSFETs
Author :
Khakifirooz, Ali ; Antoniadis, Dimitri A.
Author_Institution :
Microsystems Technol. Labs., MIT, Cambridge, MA, USA
fYear :
2002
fDate :
7-10 Oct 2002
Firstpage :
58
Lastpage :
59
Abstract :
In this paper, we examine the operation of SOI MOSFET devices with gate length down 10 nm. The results show that using the back gate as a threshold voltage control terminal offers significant advantage in terms of total power without sacrificing the performance significantly and with less constraint on fabrication. This scheme can also be used to adjust the threshold voltage caused by manufacturing variations.
Keywords :
MOSFET; elemental semiconductors; leakage currents; semiconductor device measurement; semiconductor device models; silicon; silicon-on-insulator; 10 nm; Si-SiO2; back-gate biasing; deeply scaled SOI MOSFETs; fabrication; leakage control; performance; threshold voltage; threshold voltage control terminal; total power; Leakage currents; MOSFETs; Semiconductor device modeling; Silicon; Silicon on insulator technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, IEEE International 2002
Print_ISBN :
0-7803-7439-8
Type :
conf
DOI :
10.1109/SOI.2002.1044415
Filename :
1044415
Link To Document :
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