A framework for design space exploration of parameterized VLSI systems

Author

Ascia, Giuseppe ; Catania, Vincenzo ; Palesi, Maurizio

Author_Institution

Dipt. di Ingegneria Informatica e delle Telecomunicazioni, Catania Univ., Italy

fYear

2002

fDate

2002

Firstpage

245

Lastpage

250

Abstract

The paper presents two new approaches to multi-objective design space exploration for parametric VLSI systems. Both considerably reduce the number of simulations needed to determine the Pareto-optimal set as compared with an exhaustive approach. The first uses sensitivity analysis while the second uses evolutionary computing techniques. Application to a highly parametric system-on-a-chip for digital camera applications shows the validity of the methodologies presented in terms of both accuracy of results and efficiency, measured as the number of simulations needed to determine the power/execution-time trade-off front

Keywords

Pareto distribution; VLSI; circuit CAD; circuit optimisation; circuit simulation; evolutionary computation; integrated circuit design; sensitivity analysis; Pareto-optimal set; circuit simulation; design space exploration; digital camera; evolutionary computing; multi-objective optimisation; parameterized VLSI system; sensitivity analysis; system-on-a-chip; Computational modeling; Digital cameras; Genetic algorithms; Object oriented modeling; Power system reliability; Sensitivity analysis; Space exploration; System-on-a-chip; Telecommunications; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.

Conference_Location

Bangalore

Print_ISBN

0-7695-1441-3

Type

conf

DOI

10.1109/ASPDAC.2002.994930

Filename

994930