DocumentCode :
2406468
Title :
Stairway compaction using corner block list and its applications with rectilinear blocks
Author :
Ma, Yuchun ; Hong, Xianlong ; Dong, Sheqin ; Cai, Yici ; Cheng, Chung-Kuan ; Gu, Jun
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear :
2002
fDate :
2002
Firstpage :
387
Lastpage :
392
Abstract :
The Corner Block List (CBL) was recently proposed as an efficient representation for MOSAIC packing of rectangles. Although the original method is innovative, there still remains room for improvement for our purpose. This paper proposes a compact algorithm for placement based on the corner block list. By introducing dummy blocks into CBL, our algorithm can employ dummy blocks in the packing to represent the placement, including empty rooms, which the CBL cannot represent. Our algorithm can obtain fast convergence to an optimal solution. Based on the compact approach, we propose a new way to handle arbitrary shaped rectilinear modules. The experimental results are demonstrated by some benchmark data and the performance shows the effectiveness of the proposed method
Keywords :
VLSI; circuit layout CAD; convergence of numerical methods; integrated circuit layout; MOSAIC packing; VLSI physical design; arbitrary shaped rectilinear modules; compact algorithm; corner block list; dummy blocks; fast convergence; optimal solution; placement algorithm; rectangles; rectilinear blocks; stairway compaction; Application software; Circuits; Compaction; Computer science; Embedded computing; Encoding; Runtime; Shape; Upper bound; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Conference_Location :
Bangalore
Print_ISBN :
0-7695-1441-3
Type :
conf
DOI :
10.1109/ASPDAC.2002.994952
Filename :
994952
Link To Document :
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