A 3D optoelectronic parallel processor for smart pixel processing units

To efficiently exploit the potential of future massively parallel and fine-grained optoelectronic processors well-adapted low-level algorithms have to be developed. So called bit and CORDIC algorithms are well suited for that purpose. We present a concept for an optoelectronic 3D processor based an this particular algorithm class. This processor allows a hard-wired execution of a complex functions like logarithm, exponential function, sine, cosine, are tangent, square root, multiplication and division without using sophisticated multiplication units. The strength of the 3D processor is based on lots of off-chip interconnections as it is aspired in smart pixel systems using optical I/O arrays. We compared different smart pixel architectures based on bit serial and bit parallel approaches as well as a redundant number representation. All approaches showed nearly the same throughput, whereas the redundant approach offers the best latency. Furthermore, the requirements for the electronic logic and the optical interconnection scheme are specified,