Title :
Power supply noise aware floorplanning and decoupling capacitance placement
Author :
Zhao, Shiyou ; Roy, Kaushik ; Koh, Cheng-Kok
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
Power supply noise is a strong function of the switching activities of the circuit modules. Peak power supply noise can be significantly reduced by judiciously arranging the modules based on their spatial correlations in the floorplan. In this paper, power supply noise is, for the first time, incorporated into the cost function to determine the optimal floorplan in terms of area, wire length, and power supply noise. Compared to conventional floorplanning, which only considers area and wire length, power supply noise aware floorplanning can generate better floorplan both in terms of area and peak noise. The decoupling capacitance required by each module is also calculated and placed in the vicinity of the target module during the floorplanning process. Experimental results on MCNC benchmark circuits show that the peak power supply noise can be reduced by as much as 40% and both the total area and wire length are improved due to the reduced total decoupling capacitance budget gained from reduced power supply noise
Keywords :
VLSI; capacitance; circuit layout CAD; integrated circuit interconnections; integrated circuit layout; integrated circuit measurement; integrated circuit noise; power supply circuits; MCNC benchmark circuits; VLSI; circuit modules; cost function; decoupling capacitance; decoupling capacitance placement; floorplan spatial correlations; floorplanning; floorplanning process; layout area; optimal floorplan; peak noise; peak power supply noise; power supply noise; power supply noise aware floorplanning; switching activities; target module; total area; total decoupling capacitance budget; total wire length; wire length; CMOS technology; Capacitance; Circuit noise; Cost function; Noise generators; Noise reduction; Power generation; Power supplies; Switching circuits; Wire;
Conference_Titel :
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Conference_Location :
Bangalore
Print_ISBN :
0-7695-1441-3
DOI :
10.1109/ASPDAC.2002.994968