Title :
An Efficient Architecture for Hardware Implementation of H.264/AVC Deblocking Filtering
Author :
Tobajas, Félix ; Callicó, Gustavo ; Pérez, Pedro A. ; Armas, Valentin De ; Sarmiento, Roberto
Author_Institution :
Dept. of Electron. & Autom. Eng., Univ. of Las Palmas de Gran Canaria, Las Palmas
Abstract :
In this paper, a novel hardware architecture for real-time implementation of the adaptive deblocking filtering process specified by the H.264/AVC standard, is presented. The proposed architecture is based on a double-filter strategy that results in a significant saving in filtering cycles, memory requirements and gate count when compared with state-of-the-art approaches.
Keywords :
adaptive filters; video coding; H.264-AVC deblocking filtering; adaptive deblocking filtering process; double-filter strategy; gate counts; hardware architecture implementation; hardware implementation; memory requirements; Adaptive filters; Automatic voltage control; Decoding; Filtering; Hardware; High definition video; Microelectronics; Random access memory; Read-write memory; Video sequences;
Conference_Titel :
Consumer Electronics, 2008. ICCE 2008. Digest of Technical Papers. International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-1458-1
Electronic_ISBN :
978-1-4244-1459-8
DOI :
10.1109/ICCE.2008.4588056
