Author :
Suzuki, Kazuyoshi ; Kashiyama, Toshihiko ; Fujiwara, Eiji
Abstract :
Spotty byte error control codes are very effective for correcting/detecting errors in semiconductor memory systems using recent high-density RAM chips with wide I/O data, e.g. 8, 16, or 32 bits. A spotty byte error is defined as t-bit errors within a byte of length b-bit, where 1 ≤ t ≤ b, and denoted as t/b-error. This paper proposes a new error model of two spotty byte errors occurred simultaneously, i.e., t/b-error and t´/b-error, where t ≠ t´, called complex spotty byte errors. This paper presents two complex m-spotty byte error control codes, i.e., (Stb/EC-(Stb/+St´b/)ED) codes which correct all single t/b-errors and detect both t/b-errors and t´/b-errors simultaneously, and ((Stb/+St´b/)EC) codes which correct both single t/b-errors and single t´/b-errors simultaneously. This paper also presents practical examples of the codes with parameter t´ = 1, that is, Stb/EC-(Stb/+S)ED codes and (Stb/+S) EC codes which require smaller check-bit length than the existing Stb/EC-Dtb/ED codes and the Dtb/EC codes, respectively.
Keywords :
error correction codes; error detection codes; check-bit length; complex M-spotty byte error control codes; complex spotty byte errors; error correction codes; high density RAM chips; semiconductor memory systems; t-bit errors; Computer errors; Data engineering; Decoding; Electromagnetic scattering; Error correction; Error correction codes; Information science; Read-write memory; Semiconductor memory; Sufficient conditions;