Title :
Sequential circuit testing
Author_Institution :
Santa Clara Univ., CA, USA
fDate :
Feb. 26 1990-March 2 1990
Abstract :
After a brief recap of problem areas in sequential circuit testing different approaches to testing sequential circuits are reviewed. Both synchronous and asynchronous circuits are considered. Examples are given from the following areas: (1) functional techniques, such as the checking experiment, and its extension to built-in self-test (BIST) testing and to logic synthesis; (2) heuristic techniques, such as iterative test pattern generation; (3) scan-path techniques, and (4) alternatives to scan path.<>
Keywords :
logic testing; sequential circuits; BIST; asynchronous circuits; heuristic techniques; iterative test pattern generation; logic synthesis; scan-path techniques; sequential circuit testing; sequential circuits; synchronous circuits; Circuit faults; Circuit synthesis; Circuit testing; Combinational circuits; Delay; Hazards; Sequential analysis; Sequential circuits; Test pattern generators; Timing;
Conference_Titel :
Compcon Spring '90. Intellectual Leverage. Digest of Papers. Thirty-Fifth IEEE Computer Society International Conference.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-2028-5
DOI :
10.1109/CMPCON.1990.63722
