DocumentCode :
2408444
Title :
Space efficient ESD methodology for reliable high volt applications
Author :
Naughton, John J. ; Tyler, Matthew ; Anser, Muhammad
Author_Institution :
AMI Semicond., Pocatello, ID
fYear :
0
fDate :
0-0 0
Lastpage :
28
Abstract :
LDMOS-SCR structures have been shown to provide formidable ESD protection. This work characterizes CMOS process regions widely used in high voltage technologies to control triggering characteristics >40V. This is done using the breakdown voltage of a standard gate poly structure and structures without gate oxide further enhancing reliability during an ESD event
Keywords :
electrostatic discharge; semiconductor device breakdown; semiconductor device reliability; thyristors; LDMOS-SCR structures; breakdown voltage; device reliability; electrostatic discharge protection; silicon controlled rectifier; Bonding; CMOS process; CMOS technology; Electrostatic discharge; Implants; Protection; Silicon; Space technology; Thyristors; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Electron Devices, 2006. WMED '06. 2006 IEEE Workshop on
Conference_Location :
Boise, ID
Print_ISBN :
1-4244-0374-X
Type :
conf
DOI :
10.1109/WMED.2006.1678292
Filename :
1678292
Link To Document :
بازگشت