Title :
Optimization on SCR device with low capacitance for on-chip ESD protection in UWB RF circuits
Author :
Lin, Chun-Yu ; Ker, Ming-Dou
Author_Institution :
Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu
Abstract :
Low capacitance (low-C) design on ESD protection device is a solution to mitigate the radio-frequency (RF) performance degradation caused by electrostatic discharge (ESD) protection device. Silicon-controlled rectifier (SCR) device has been used as an effective on-chip ESD protection device in RF ICs due to the smaller layout area and small parasitic capacitance under the same ESD robustness. In this paper, the modified lateral SCR (MLSCR) realized in waffle layout structure is studied to minimize the parasitic capacitance and the variation of the parasitic capacitance within ultra-wide band (UWB) frequencies. With the minimized parasitic capacitance, the degradation on RF circuit performance due to ESD protection devices can be reduced. The waffle MLSCR with low parasitic capacitance is suitable for on-chip ESD protection in UWB RF ICs. Besides, the turn-on speed of MLSCR with waffle layout structure is verified to be better than that with conventional stripe structure.
Keywords :
electrostatic discharge; optimisation; radiofrequency integrated circuits; thyristors; ultra wideband communication; SCR device; UWB RFIC; electrostatic discharge; low capacitance design; on-chip ESD protection; optimization; parasitic capacitance; radiofrequency performance degradation; silicon-controlled rectifier device; Anodes; CMOS technology; Circuits; Degradation; Electrostatic discharge; Parasitic capacitance; Protection; Radio frequency; Robustness; Thyristors;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2008. IPFA 2008. 15th International Symposium on the
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2039-1
Electronic_ISBN :
978-1-4244-2040-7
DOI :
10.1109/IPFA.2008.4588154