Reliability of Cu pillar bump for flip chip and 3-D SiP

Cu pillar bumps with eutectic SnPb solder were annealed and their microstructures were investigated. Linear relationship was observed between thickness of intermetallic compounds (IMCs: Cu₆Sn₅, Cu₃Sn) and square root of time at 120 and 150degC. Kirkendall voids, formed by the diffusivity differences between Cu and Sn, were observed near the interface between Cu and Cu₃Sn. There was a change in slope of the linear relationship between IMCs thickness and square root of time at 165degC when all Sn was consumed. Cu₆Sn₅ growth rate was retarded, while Cu₃Sn growth rate was accelerated. The activation energies for Cu₆Sn₅, Cu₃Sn, and Kirkendall voids growth were estimated to be 1.77, 0.72, and 0.36 eV, respectively. The microstructures of Cu pillar bumps with pure Sn were investigated by in-situ scanning electron microscopy under annealing and high current-stressing conditions. It was found that IMC growth rate under annealing condition obeyed parabolic rate law, while that under high current-stressing condition IMC growth rate did not obeyed linear rate law. IMC growth rate under high-current stressing condition was faster than that under annealing condition which is presumed to be caused by the atomic migration enhancement due to the electron wind force.