DocumentCode :
2409462
Title :
An FPGA implementation efficient equalizer for ISI removal in wireless applications
Author :
Kaur, Chanpreet ; Mehra, Rajesh
Author_Institution :
NITTTR, PU, Chandigarh, India
fYear :
2010
fDate :
3-5 Dec. 2010
Firstpage :
96
Lastpage :
99
Abstract :
In telecommunication, Intersymbol interference (ISI) is caused by multipath propagation. The bandlimited frequency selective time dispersive channel distorts the transmitted signal, causing successive symbols to blur together. Therefore, the main objective of designing the transmitter and receiver is to minimize the effects of intersymbol interference, and thereby deliver the digital data to its destination with the smallest error rate possible. In this paper Adaptive Equalization technique is used to combat intersymbol interference. The proposed model is synthesized with ISE, simulated with Modelsim and implemented on Virtex2 based xc2v1500-5bg575 target device. The result shows that proposed model has the advantages of reduction in ISI using simple and less computational complex LMS algorithm along with enhanced performance in terms of speed, cost and area with existing results.
Keywords :
adaptive equalisers; dispersive channels; field programmable gate arrays; intersymbol interference; least mean squares methods; multipath channels; radio receivers; radio transmitters; FPGA; ISI removal; LMS algorithm; adaptive equalization technique; frequency selective time dispersive channel; intersymbol interference; multipath propagation; receiver; transmitter; Adaptation model; Adaptive equalizers; Adaptive filters; Field programmable gate arrays; Least squares approximation; Wireless communication; FPGA; FSE; ISI; LMS; MAC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Trends in Robotics and Communication Technologies (INTERACT), 2010 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4244-9004-2
Type :
conf
DOI :
10.1109/INTERACT.2010.5706208
Filename :
5706208
Link To Document :
بازگشت