DocumentCode
2409530
Title
Analysis and modeling of sequential iterative algorithms for parallel and pipeline implementations
Author
Bu, Jichun ; Deprettere, Ed F.
Author_Institution
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
fYear
1988
fDate
7-9 June 1988
Firstpage
1961
Abstract
The authors present a formal technique to model and analyze sequential iterative algorithms for parallel and pipeline implementations. The objective is to transform a sequential iterative algorithm, described by nested FOR loops, into a static structure called a dependence graph (DG), from which parallelism (if any) can be detected by using both graph-theoretic and algebraic methods. The essence of the method is to find the trace of the variables in an algorithm. The DG of an algorithm is defined in terms of traces.<>
Keywords
graph theory; iterative methods; parallel architectures; pipeline processing; dependence graph; nested FOR loops; parallel architectures; pipeline architectures; sequential iterative algorithms; Algorithm design and analysis; Application software; Computer architecture; Concurrent computing; Design methodology; Equations; Iterative algorithms; Parallel processing; Pipelines; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.15323
Filename
15323
Link To Document