• DocumentCode
    2409887
  • Title

    A novel pseudo tri-gate vertical MOSFET with source/drain tie

  • Author

    Lin, Jyi-Tsong ; Tsai, Ying-Chieh ; Eng, Yi-Chuen ; Kang, Shiang-Shi ; Tseng, Yi-Ming ; Tseng, Hung-Jen ; Lin, Po-Hsieh

  • Author_Institution
    Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung
  • fYear
    2008
  • fDate
    7-11 July 2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper investigates the device behaviours of a pseudo tri-gate ultra-thin-channel vertical MOSFET with source/drain tie. For comparison two transistors are designed. According to the 2D simulation, our proposed structure can effectively enhance the drain current and the thermal stability, mainly due to the ultrathin channel (Tsi = 10 nm). The fabricated device have very low subthreshold swing near 60 mV/dec with channel length 40 nm to 90 nm and excellent GM of 4 mS/mum with channel length 35 nm owing to its unique features, when compared to its counterpart. Also, the respective discontinuous buried oxide under the channel and the source/drain regions can construct a natural source/drain tie to overcome short-channel effects and self-heating effects as well.
  • Keywords
    MOSFET; thermal stability; discontinuous buried oxide; pseudo trigate vertical MOSFET; self-heating effects; short-channel effects; source/drain tie; thermal stability; ultrathin-channel vertical MOSFET; Etching; FETs; MOSFET circuits; Maintenance; Oxidation; Planarization; Process design; Semiconductor device reliability; Silicon on insulator technology; Thermal stability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits, 2008. IPFA 2008. 15th International Symposium on the
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-2039-1
  • Electronic_ISBN
    978-1-4244-2040-7
  • Type

    conf

  • DOI
    10.1109/IPFA.2008.4588183
  • Filename
    4588183