DocumentCode
2409935
Title
Zero-temperature-coefficient biasing point of 2.4-GHz LNA in PD SOI CMOS technology
Author
El Kaamouchi, M. ; Moussa, M. Si ; Raskin, J.P. ; Vanhoenacker-Janvier, D.
Author_Institution
Univ. catholique de Louvain, Louvain-la-Neuve
fYear
2007
fDate
9-12 Oct. 2007
Firstpage
1101
Lastpage
1104
Abstract
This paper reviews and analyzes a fully integrated Low-Noise Amplifier (LNA) for low-power and high temperature applications, in 130 nm Partially Depleted Silicon-on-Insulator (SOI) CMOS technology. The LNA has been characterized over a temperature range from 25 to 200deg C and designed using a cascode inductive source degeneration topology. Thanks to the SOI technology and the choice of the Zero-Temperature- Coefflcient (ZTC) bias point, the LNA measurements show a minor degradation of the gain due to the temperature variation for a power consumption of 2.3 mW under 1.2 V supply is applied. The effects of high temperature are observed on the gain of the LNA and on the SOI transistors in order to analyze the behavior of the LNA versus temperature effect.
Keywords
CMOS integrated circuits; low noise amplifiers; silicon-on-insulator; LNA; PD SOI CMOS technology; SOI transistors; cascode inductive source degeneration topology; frequency 2.4 GHz; low-noise amplifier; minor degradation; partially depleted silicon-on-insulator; power 2.3 mW; size 130 nm; temperature 25 degC to 200 degC; voltage 1.2 V; zero-temperature-coefficient biasing point; CMOS technology; Circuits; Impedance; Low-noise amplifiers; Petroleum; Silicon on insulator technology; Temperature distribution; Temperature sensors; Topology; Well logging;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2007. European
Conference_Location
Munich
Print_ISBN
978-2-87487-001-9
Type
conf
DOI
10.1109/EUMC.2007.4405390
Filename
4405390
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