Title :
DIBL in short-channel strained-Si n-MOSFET
Author :
Mahato, S.S. ; Chakraborty, P. ; Maiti, T.K. ; Bera, M.K. ; Mahata, C. ; Sengupta, M. ; Chakraborty, A. ; Sarkar, S.K. ; Maiti, C.K.
Author_Institution :
Dept. of Electron.&ECE, Indian Inst. of Technol., Kharagpur
Abstract :
Drain-induced barrier lowering in substrate-induced strained-Si n-MOSFETs has been investigated. The variation of subthreshold swing as a function of both the gate length and gate to source voltage has also been examined.
Keywords :
MOSFET; silicon; Si; Si n-MOSFET; drain-induced barrier lowering; gate length; gate-to-source voltage; subthreshold swing; CMOS integrated circuits; CMOS technology; Doping profiles; Integrated circuit reliability; Integrated circuit technology; MOSFET circuits; Rapid thermal processing; Silicon; Temperature; Threshold voltage;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2008. IPFA 2008. 15th International Symposium on the
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2039-1
Electronic_ISBN :
978-1-4244-2040-7
DOI :
10.1109/IPFA.2008.4588186
