• DocumentCode
    241
  • Title

    Litho-Friendly Decomposition Method for Self-Aligned Triple Patterning

  • Author

    Mirsaeedi, Minoo ; Torres, Andres J. ; Anis, Mohab

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
  • Volume
    22
  • Issue
    5
  • fYear
    2014
  • fDate
    May-14
  • Firstpage
    1170
  • Lastpage
    1174
  • Abstract
    Multiple patterning lithography is the most likely manufacturing process for sub-32 nm technology nodes. Among different multiple patterning methods, self-aligned patterning has attracted much interest due to its robustness against overlay errors. However, self-aligned patterning compliance is subject to the litho-friendliness of the applied decomposition method. This brief establishes self-aligned triple patterning (SATP) decomposition requirements and proposes a litho-friendly layout decomposition method. First, the major SATP litho-friendliness requirements are explained. In-silico experiments on SATP process indicate that layout features printed by the structural spacers are the most accurate ones. Therefore, we propose an ILP-based decomposition which avoids decomposition conflicts and maximizes the use of structural spacers simultaneously. Experiments reveal that the proposed method improves overlay robustness and line-edge roughness of the attempted test cases.
  • Keywords
    lithography; nanopatterning; line-edge roughness; litho-friendly layout decomposition method; self-aligned triple patterning; structural spacers; Design for manufacturability; design rules; lithography; multiple-patterning (MP) technology;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2013.2265309
  • Filename
    6542734