Characterization and modeling of program/erase induced device degradation in 2T-FNFN-NOR flash memories

Author

Tao, Guoqiao ; Chauveau, Helene ; Boter, Dick ; Van Der Vegt, Erik ; Dormans, Do ; Verhaar, Rob

Author_Institution

NXP Semicond., Nijmegen

fYear

2008

fDate

7-11 July 2008

Firstpage

1

Lastpage

5

Abstract

In this paper, we report the program/erase degradation mechanisms in two transistor (2T) Fowler-Nordheim (FN) tunneling operated flash memories, based on extensive experimental study of the degradation characteristics of such 2T-FNFN test memory arrays and reference transistor arrays from several generation process technologies. A quantitative model has been established describing the degradation characteristics under various stress conditions (i.e. degradation due to program/erase cycling at various voltages and temperatures). A software tool has been developed to estimate the reliability performance of various products under different use conditions. This model (and tool) can also be used to estimate the product reliability performance in future process generations.

Keywords

NOR circuits; circuit reliability; flash memories; tunnelling; 2T-FNFN-NOR flash memory; generation process technology; memory arrays; product reliability performance; program/erase cycling; program/erase induced device degradation; reference transistor arrays; software tool; two transistor Fowler-Nordheim tunneling operated flash memory; Character generation; Degradation; Flash memory; Nonvolatile memory; Software tools; Stress; Temperature; Testing; Tunneling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2008. IPFA 2008. 15th International Symposium on the

Conference_Location

Singapore

Print_ISBN

978-1-4244-2039-1

Electronic_ISBN

978-1-4244-2040-7

Type

conf

DOI

10.1109/IPFA.2008.4588191

Filename

4588191