An FPGA softcore based implementation of a bird call recognition system for sensor networks

Author

Liu, Hongzhi ; Bergmann, Neil W.

Author_Institution

Sch. of ITEE, Univ. of Queensland, Brisbane, QLD, Australia

fYear

2010

fDate

26-28 Oct. 2010

Firstpage

1

Lastpage

6

Abstract

To investigate the on-sensor processing capabilities of FPGAs, this paper presents a bird call recognition system based on linear predictive cepstral coefficients (LPCC) and dynamic time warping (DTW) algorithms for sensor network applications, and compares two different implementations on a Xilinx Spartan-3E FPGA with MicroBlaze soft processor. The experimental results show that compared to the software-only solution, the software / hardware (SW/HW) implementation with hardware coprocessor for DTW yields significant performance improvement by the factor of 13.8 and 33.4 respectively for two example inputs, and achieves about 31.1 times energy efficiency by using only 7.5% more power.

Keywords

acoustic signal processing; cepstral analysis; coprocessors; field programmable gate arrays; wireless sensor networks; DTW algorithm; FPGA softcore-based implementation; LPCC algorithm; MicroBlaze soft processor; SW-HW implementation; Xilinx Spartan-3E FPGA; bird call recognition system; dynamic time warping algorithm; hardware coprocessor; linear predictive cepstral coefficients; sensor networks; software-hardware implementation; Birds; Digital signal processing; Energy efficiency; Feature extraction; Field programmable gate arrays; Hardware; Software; Digital Signal Processing; Energy Efficiency; FPGAs; Sensor Networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Architectures for Signal and Image Processing (DASIP), 2010 Conference on

Conference_Location

Edinburgh

Print_ISBN

978-1-4244-8734-9

Electronic_ISBN

978-1-4244-8733-2

Type

conf

DOI

10.1109/DASIP.2010.5706238

Filename

5706238