• DocumentCode
    2410178
  • Title

    Different approaches to add reconfigurability in a SoC architecture

  • Author

    Gupta, Bhusan ; Borgatti, Michele

  • fYear
    2003
  • fDate
    2003
  • Firstpage
    398
  • Abstract
    Summary form only given. Dynamically reprogrammable hardware has been advocated in the academic research community as the next hot area in system design for some time now. The lack of integrated systems in the marketplace that incorporate dynamic reprogramming stands at contrast to the enthusiasm of the research community for the topic. We would like to offer as a middle ground several examples of dynamic reprogramming in working silicon that might help to illuminate the path towards the future of SoCs. In our research at STMicroelectronics, we have built two independent SoCs that utilize embedded FPGAs to provide the dynamic reprogramming capability. The benefit of the embedded FPGA has been demonstrated to range from application acceleration to augmenting functionality and providing silicon area reuse. The first system to be described is intended for image processing and biometric recognition. The second system is aimed at wireless LAN baseband processing.
  • Keywords
    embedded systems; field programmable gate arrays; programmable circuits; reconfigurable architectures; system-on-chip; biometric recognition; dynamic reprogramming; embedded FPGA; image processing; integrated hardware; reconfigurable architecture; silicon area reuse; system design; system-on-chip; wireless LAN baseband processing; Acceleration; Baseband; Biometrics; Field programmable gate arrays; Hardware; Image processing; Image recognition; Silicon; Testing; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2003
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1870-2
  • Type

    conf

  • DOI
    10.1109/DATE.2003.1253641
  • Filename
    1253641